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IEC 60822:1988 ed1.0
VSB - Parallel Sub-system Bus of the IEC 60821 VMEbus
311 стр.
Действует
Электронный (pdf)Печатная копия
540.54 CHF (включая НДС 20%)
Разработчик:
Зарубежные/IEC
ICS:
35.200 Interface and interconnection equipment / Интерфейсы и межсоединительные устройства35.160 Microprocessor. Including PCs, calculators, etc. / Микропроцессорные системы. Включая персональные ЭВМ, калькуляторы и т.д.31.080.01 Semiconductor devices in general / Полупроводниковые приборы в целом
Описание
The VSB bus was designed to meet the needs of multiprocessor systems based on high-performance 32-bit microprocessors built up from board assemblies. lt includes a high-speed asynchronous data transfer bus allowing masters to direct the transfer of binary data to and from slaves according to 4 kinds of cycles: address-only, single-transfer, block-transfer and interrupt-acknowledge cycles. It also includes an arbitration bus enabling arbiter modules and/or requester modules to coordinate the use of the data-transfer bus according to two arbitration methods (series or parallel).Note: -For the price of this publication, please consult the ISO/IEC price-code list.