Mechanical standardization of semiconductor devices. Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array (FBGA) and Fine-pitch Land Grid Array (FLGA)— 22 стр.
Mechanical standardization of semiconductor devices. Design guideline of open-top-type sockets for fine-pitch ball grid array and fine-pitch land grid array (FBGA/FLGA)— 18 стр.
Mechanical standardization of semiconductor devices. General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for glass sealed ceramic quad flatpack (G-QFP)— 14 стр.
Corrigendum 2 - Mechanical standardization of semiconductor devices - Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for ball grid array (BGA)— 1 стр.
Mechanical standardization of semiconductor devices. Design guideline of open-top-type sockets for fine-pitch ball grid array and fine-pitch land grid array (FBGA/FLGA)— 18 стр.
Mechanical standardization of semiconductor devices - Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for ball grid array (BGA) (IEC 60691-6-18:2010) (english version)
Mechanical standardization of semiconductor devices - Part 6-21: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline packages (SOP) (IEC 60191-6-21:2010) (english version)
Mechanical standardization of semiconductor devices - Part 6-17: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide für stacked packages - Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA) (IEC 60191-6-17:2011) (english version)
Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ) (IEC 60191-6-20:2010) (english version)
Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guidelines for fine-pitch land grid array (FLGA) (IEC 60191-6-12:2011) (english version)
