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IEC 62530-2:2023 ed2.0

Действует
SystemVerilog - Part 2: Universal Verification Methodology Language Reference Manual — 457 стр.
IEC 62530-2:2023 establishes the Universal Verification Methodology (UVM), a set of application programming interfaces (APIs) that defines a base class library (BCL) definition used to develop modular, scalable, and reusable components for functional verification environments. The APIs and BCL are based on the IEEE standard for SystemVerilog, IEEE Std 1800™.1. This is an IEC/IEEE dual logo standard.
ICS
25.040.01 Industrial automation systems in general / Промышленные автоматизированные системы в целом
35.060 Languages used in information technology / Языки, используемые в информационных технологиях